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Embedded Controls by Design, LLC Electronic Design and Consulting Services |
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Motorola Coldfire / M68K
I have been working with Motorola processors for more than fifteen years.
Memory and Peripherals
I have interfaced these processors with all common types of memory including
EPROM, FLASH, SRAM, DRAM & SDRAM. I have also interfaced these
processors to may different types of peripheral chips including UARTs, DRAM
controllers, display controllers, IEEE1394 link layers, and Ethernet MACs.
Bus Operations
I have in-depth knowledge of the 68K bus operation including byte, word,
long-word, and line read and write operations, interrupt vector fetches. I
understand all bus control signals including but not limited to: TS~, TIP~, R/W~,
TA~, TEA~, SIZ[], TT[] & TM[]. I have implemented bus decode and
external bus masters in CPLDs and FPGAs. BR~, BG~, & BD~ are used for
taking external control of the external bus.
Exception Processing
I comprehend exception processing including priority levels, vectored and
autovectered interrupts. I have implemented interrupt priority encoders
and vector generators in FPGAs. The FPGA uses the IPL[] signals to signal
a pending interrupt to the processor and the interpret the bus control signals (TT[]
& TM[]) to respond to the vector request.
This is just some of my in-depth knowledge of the Motorola 68K and Coldfire families.